Development of the hottest C-band broadband low no

2022-08-13
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Development of C-band broadband low-noise frequency source

Abstract: This paper introduces a scheme to realize C-band low phase noise frequency hopping source by using phase-locked loop and mixing technology. This scheme realizes frequency hopping and mixing at the same time through two loops, with step of 36 MHz and output frequency of 4428 ~ 5220 MHz. It has the characteristics of low phase noise and low spurious. The difference from the previous phase-locked frequency synthesis is that in the previous mixing, the main loop signal of 4428 ~ 5220 MHz is used as the RF end of the mixer, while this scheme can fully suppress the spurious of the auxiliary loop, and the main loop signal is amplified by the amplifier as the lo end of the mixer. The test results show that the system meets the index requirements of the project, and the frequency synthesis scheme is feasible

key words: spurious suppression; Frequency synthesizer; Low phase noise; Loop filter

microwave frequency source is an important component in microwave communication, microwave measurement and radar technology. Its phase noise performance and spurious performance directly affect the performance and reliability of the system. Therefore, it is the main trend to seek frequency sources with lower phase noise, higher purity spectrum and higher stability

l main indicators and schemes of the system

1.1 main indicators of the system

output frequency range: 4428 ~ 5220 MHz; Step frequency: 36 MHz; Phase noise: 100 DBC/

(33. Room temperature 10oC (3) 5oC;) Due to the strict requirements for spurious output in the band of 4000 ~ 4200 MHz, and the optimal auxiliary loop point frequency is 4140 MHz, it is difficult to achieve a 70 DBC index under a certain cavity volume. Therefore, considering the deterioration degree of phase noise in the auxiliary loop, 4320 MHz is selected as the auxiliary loop

(4) in order to prevent the auxiliary ring point frequency of 4320 MHz from being spuriously coupled to the output end, the power divider and the main ring signal of 4428 ~ 5220 MHz are used as the local oscillator of the mixer through two-stage amplification, and the auxiliary ring point frequency of 4320 MHz is used as the RF end of the mixer. In this scheme, 36 MHz low phase noise constant temperature crystal oscillator is selected as the reference source of the two loops, and the ultra-low phase noise analog PLL chip hmc440 of Hittite company is selected for the main loop and the auxiliary loop to improve the phase noise performance of the system. The reference frequency of the auxiliary ring is 36 MHz, and the frequency point of 4320 MHz is output; The reference frequency of the main ring is 36 MHz, and the output frequency is 4428 ~ 5220 MHz. After passing through the directional coupler, it mixes with the frequency point output by the auxiliary ring to 108 ~ 900 MHz, and returns to the main ring phase detector for comparison with the reference frequency. All controls are completed by the single chip microcomputer, and the corresponding frequency output is carried out according to the input of external data (BCD code)

2 circuit realization

when designing a single-chip frequency synthesizer, the main work is to design the loop bandwidth of the frequency synthesizer, so that the index of the frequency synthesizer can achieve the best comprehensive performance in terms of phase noise, spurious, frequency modulation speed and stability

2.1 optimal loop bandwidth

since this project does not require frequency hopping speed, the loop bandwidth adopts the optimal bandwidth design to make the phase noise as good as possible. The output noise of the frequency synthesizer is as follows:

, where LLP (JW) is the noise of the phase loop chip that locks, and there are more than 1 million Mongolian tourists visiting all over China every year, lvco (JW) is the phase noise of VCO, and HN (JW) is the transfer function of the n-normalized loop filter. From the above formula, it can be seen that the loop performs low-pass filtering on the noise source in the band, so it is hoped that the lower the loop bandwidth FC, the better; However, the loop has high pass filtering for VCO, and the wider the loop, the better. In order to take into account this contradiction, referring to figure 2, both phase noises can be reasonably suppressed. The loop bandwidth FC can be selected to be close to the optimal state near the intersection of the spectral density lines of the two noise sources. However, considering that the crystal oscillator noise will deteriorate by 20log (n/R), the actual bandwidth should be slightly smaller

2.2 main and auxiliary loop circuit design

theoretical estimation in band phase noise estimation formula (regardless of the phase noise of the crystal oscillator):

the frequency of the auxiliary loop is relatively high. In order to make the noise of the system not worsen after mixing and obtain a low phase noise, hmc440 phase detector chip is selected here. This chip belongs to the analog phase detector. From a 153 DBC given in the hmc440 technical data/from hmc440, the phase noise of the PLL chip can be deduced as a 233 DBE/Hz, It can be deduced from the above formula (2):

it can be seen that the phase noise in the ring of the output frequency signal of the main ring and the auxiliary ring exceeds the design index of the frequency source

the loop filter model is shown in Figure 4. In order to obtain the best loop bandwidth, the loop filter parameters R1, C1, R2, C2 need to be adjusted. According to the classical theory of phase-locked loop, the values of each element of the loop filter can be calculated according to the loop bandwidth N and damping coefficient

where KD is the phase discrimination sensitivity of the phase detector, where KD of hmc440 is 0.286 V/rad, K is the voltage control sensitivity (rad/V) of VCO, and N is the frequency doubling multiple of PLL. The damping coefficient takes into account the overshoot and attenuation of the filter, and takes a value between 0.707 and 1. In this way, as long as C2 takes a value, R1 and R2 can be determined at the same time. The introduction of C1 is mainly to filter the harmonic generated by the phase detector, and the pole introduced should be far away from the main pole, that is, the loop filter is completely determined

3 hardware and measured data

considering the cost, the VCO of the main ring needs to output two range frequencies: 4428 ~ 4716 MHz and 4752 ~ 5220 MHz, which are switched by two VCO switches. In addition, considering the interaction between VCOs, many spurious may be generated. This design adopts VCO power-off mode to ensure that only one VCO works at any time, so as to avoid the interaction between them

mixing adopts hmc218lp3 passive mixer. Because it is passive, the local oscillator power is required to be relatively large, so the main ring output needs to pass through two-stage amplifier hmc3lllp3. During debugging, it was found that the nonlinearity of the amplifier increased the harmonic component of the local oscillator, so the second stage amplifier was amplified to about 10 DBM to drive the lo local oscillator of hmc218lp3 to avoid the amplifier entering the saturation state. In addition, the point frequency of the auxiliary ring is 4320 MHz, but in the high-end field of the industry, due to the extremely high requirements of utilization, when the RF port signal reaching hmc218lp3 is about - 7 DBM, better spurious and phase noise indicators are achieved

phase noise, spurious suppression, harmonic suppression and output power are measured by hp8564e, a spectrum analyzer with an unprecedented range of high-speed railway development plans developed by the United States, Russia, France, Britain, Brazil and other countries. The phase noise can reach a 104.5 DBC/

4 Conclusion

this paper gives a scheme of C-band broadband low-noise frequency source, The main ring is used to drive the local oscillator, and the test data show that this scheme is feasible. I believe that after careful design and debugging, the expected goal can be achieved

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